荣耀彩票代理

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FPGA实现串口与iic控制器总结(3)

来源:IT165收集  发布日期:2016-05-03 22:37:14

ZAIPOUXILE《SHENRUQIANCHUWANZHUANFPGA》DECHUANKOUDAIMAHEIICKONGZHIQIDAIMA、xilinxGUANFANGDExilinxDEiicKONGZHIQI(CANJIANSHU《FPGACPLDSHEJIGONGJU──Xilinx ISESHIYONGXIANGJIE》)、《PIANSHANGXITONGSHEJISIXIANGYUYUANDAIMAFENXI》YISHUZHONGDAIYOUwishboneJIEKOUDEiicKONGZHIQIHOU,BENWENCHANGSHIDUIYISHANGZUOYIXIEZONGJIE,BINGFENXIBUTONGDEiicKONGZHIQIDESHIXIANQUBIE。

荣耀彩票代理SHANGYIJIANG,WOMENFENXILETEQUANDEiicKONGZHIQIDESHIXIAN,ZHEIYIJIANGJIANGJIXULING2ZHONGDAIYOUZONGXIANJIEKOUHEGENGCHONGFENSHIXIANiicXIEYIDELIZI。XIAYIJIANGJIANGTANTANSOCJIAGOUZHONGDEwishboneZONGXIANJIAGOUJIWAISHEGUAZAI,YIJIYIXIERUANYINGJIANJIEHEDEDICENGDEDONGXI,ZHUYAOCANKAO《ZIJIDONGSHOUXIEcpu》YISHUJIXIANGGUANDEWANGYEZILIAODENG,JINGQINGQIDAI。

 

2、IIC控制器

2.2 xilinx的iic控制器

该控制器主要是参考《FPGACPLD设计工具──Xilinx ISE使用详解》第10章和官方代码,资料链接见文末给出的下载链接地址。

荣耀彩票代理iicXIEYIDEZHISHITONGYANGBUZAIZHUISHU,ZHISHITIJIDIANSHANGYIJIANGZHONGMEIYOUHUOWUXUGUANZHUDEDIFANG:

荣耀彩票代理1、I2CZONGXIANTONGXINSHI,QISHIWEIHOUDEDIYIGEZIJIEYONGYUXUNZHI,GAIZIJIEBAOHAN7BITEDECONGJIDIZHIHE1BITEDEDUXIEZHISHIBITE, YIBANERYAN,CONGJIDIZHIYOUYIGEGUDINGBUFENHEYIGEKEBIANCHENGBUFENGOUCHENG。

荣耀彩票代理2、FUHEGESHIZHONG,CISHIZHUJILIANXUDUICONGJIJINXINGDUOCIDUXIECAOZUO,YINCIZAICHANSHENGQISHIWEI、SHOUFASHUJU、CHANSHENGTINGZHIWEIDEZHENGGECHUANSHUGUOCHENGZHONG,SHUJUDEFANGXIANGFASHENGDUOCIGAIBIAN,CHUANSHUGAIBIANFANGXIANGSHI,ZHUJIHUIZHONGXINFACHUZHONGFUQISHIWEIHECONGJIDIZHI(SHANGYIJIANGZHONGWEISHENMEDUDELIUCHENGYAOFUZAXIEDEYUANYIN)。

荣耀彩票代理3、I2CZONGXIANZAIYIGESHIKEZHINENGYOUYIGEZHUJI,DANGI2CZONGXIANTONGSHIYOULIANGGEHUOGENGDUODEQIJIANXIANGCHENGWEIZHUJISHI,JIUXUYAOJINXINGZHONGCAI,SHIZHONGTONGBUGUOCHENGDEMUDESHIWEIZHONGCAITIGONGYIGEQUEDINGDESHIZHONG。SCL XIANDIDIANPINGSHIJIANQUJUEYUDIDIANPINGSHIJIANZUIZHANGDEZHUJI,GAODIANPINGSHIJIANQUJUEYUGAODIANPINGSHIJIANZUIDUANDEZHUJI。ZHUJIZHIHUIZAI I2C ZONGXIANKONGXIANSHICHANSHENGQISHIWEI,DANSHIZAIQISHIWEIDEBAOCHISHIJIAN tHD;STANEIKENENGYOULIANGGEHUOYISHANGDEZHUJICHANSHENGQISHIWEI,ZUIZHONGZONGXIANSHANGDEQISHIWEIYOUTAMENZHIJIANDEXIANYUYUNSUANJUEDING,ZHONGCAIZAISUIHOU SDA XIANSHANGFASONGDEBITEZHONGJINXING。RUGUOYIGEZHUJIJUYOUCONGJIGONGNENG,NEIMEDANGTASHIQUZHONGCAISHI,BIXULIJIQIEHUANDAOCONGJIZHUANGTAI,YINWEITAKENENGZHENGZAIBEIQITAZHUJIXUNZHI。

4、RUTU

荣耀彩票代理JIANGWANLEZHEIXIEGUANYUiicXIEYIDEDIANJIXUXIAMIANDEBUFEN.

I2CZONGXIANKONGZHIQIDEZHUYAOZUOYONGSHITIGONGUC(Microcontroller,WEIKONGZHIQIHUODANPIANJI)HEI2CZONGXIANZHIJIANDEJIEKOU,WEILIANGZHEZHIJIANDETONGXINTIGONGWULICENGXIEYIDEZHUANHUAN。ZHEIXIEI2CXIEYIDEQIJIAN,JIUBUNENGZHIJIEHEDANPIANJIWAIWEIZONGXIANXIANGLIAN,ZHEIXIEQIJIANKEYIGUAZAIYITAOI2CZONGXIANSHANG,ZAITONGGUOI2CZONGXIANKONGZHIQIHEµCLIANQILAI,RUTUSUOSHI。ZAISOCSHEJIZHONGLEISIDEXIEYIZHUANHUANMOKUAIYONGDEFEICHANGDUO。

I2C ZONGXIANKONGZHIQIBAOHANLIANGGEZHUYAOBUFEN,YISHIWEIKONGZHIQIJIEKOU,JIANCHENGµCJIEKOU,ERSHI I2C Master/Slave JIEKOU,JII2CJIEKOU,TONGGUOZHEILIANGGEJIEKOU,I2CZONGXIANKONGZHIQISHIXIANLEWEIKONGZHIQIWAIWEIZONGXIANHE I2C ZONGXIANDELIANJIE。NEIMEZHEILIDEWEIKONGZHIQIJIEKOUSHINAZHONGKONGZHIQI?SHIFOUSHINAZHONGZONGXIANXIEYI,GENJUreadmeWENJIANKEYIFAXIANYUANLAISHI MC68307DANPIANJI,SHIYIKUANJICHENGDEDUOZONGXIANCHULIQI。

荣耀彩票代理JIANGQINGCHULEYUANLI,WOMENLAIKANKANJUTISHEJI:

This zip file contains the following folders:
-- Verilog Source Files:
i2c_blk_ver.v - top level file
i2c_control_blk_ver.v - control function for the I2C master/slave
shift8_blk_ver.v - shift register
uc_interface_blk_ver.v - uC interface function for an 8-bit 68000-like uC
upcnt4_blk_ver.v - 4-bit up counter

KEYIKANDAO5GEWENJIAN。uc_interface_blk_ver.v SHIXIANLEYIXIEJICUNQIYIJIDUIXIACENGMOKUAIDEKONGZHIXINHAO,shift8_blk_ver.vSHICHUANXINGSHOUFA,upcnt4_blk_ver.vSHI4WEIJISHUQI,i2c_blk_ver.v SHIDINGCENG,LIHUALEuc_interface_blk_verHEi2c_control_blk_ver。i2c_control_blk_verZESHIXIANLEZHONGCAI,startDENGSHOUFALIUCHENGZHUANGTAIJIDENG。ZHENGTIJIAGOURUXIATU:

荣耀彩票代理ZHENGGESILUHAISHIHENQINGCHUDE。JIEKOUCHUZHUYAOSHIYIXIEJICUNQI,JICUNQIDEXINHAODAOiicZHONGKONGZHIDICENGDEYUNZHUAN。

µC 接口主要包含状态寄存器MBSR、控制寄存器MBCR、地址寄存器MADR、数据寄存器MBDR 和地址译码/总线接口模块。状态寄存器指示I2C总线控制器的当前状态,如传送是否完成、总线是否忙等信息,控制寄存器是µC控制I2C总线控制器的主要途径,通过置0/置1可以完成I2C总线控制器使能、中断使能、Master/Slave模式选择、产生起始位等操作。地址寄存器保存着I2C总线控制器作为Slave时的地址。数据寄存器用于保存接收或是待发送的数据。

XIAMIANFENXIYUANDAIMA,YOUYUYUANDAIMAZHONGDUO,ZHINENGZHAICHUBUFEN,SHULIZHUYAOSILUHEZHONGYAOXINHAOXIAN,DAJIAKEYIXIAZAIWOZHUSHIDEDAIMA。

荣耀彩票代理i2c_blk_ver.v DINGCENGWENJIAN:

 

module i2c_blk (sda, scl, addr_bus, data_bus, as, ds, r_w, dtack, irq, mcf, clk,
                reset);
 
  parameter I2C_ADDRESS = 16'b0000000000000000;
  //   I2C bus signals
  inout sda;
  inout scl;
  //   uC interface signals
  input [23:0] addr_bus;
  inout [7:0] data_bus;
  input as;                //   address strobe, active low
  input ds;                //   data strobe, active low
  input r_w;               //   read/write
  output dtack;            //   data transfer acknowledge 给处理器的,表示数据是否准备好了
  output irq;              //   interrupt request
  inout mcf;               //   temporary output for testing  给处理器,表示传输是否结束
  //   clock and reset
  input clk;
  input reset;
这个是顶层的输入输出,不是什么特殊的总线结构,比较好理解,pdf中有详细的中文解释每个信号的含义。

 

JIEXIALAISHIYIXIEwireXING,SHIJISHANGJIUSHINEIXIEJICUNQIZHONGYOUHANYIDEMEIYIWEI,JIGEZHONGKONGZHIXINHAOXIAN,BIANYULIHUADE i2c_control I2C_CTRLYU uC_interface #(I2C_ADDRESS) uC_CTRLMOKUAIJIANDEJIEKOUHULIAN。

JIEXIALAICONGDINGCENGWANGXIA,uC_interfaceMOKUAI:

 

 //   Internal I2C Bus Registers
  //   Address Register (Contains slave address)
  inout [7:0] madr;
  //   Control Register		
  inout men;               //   I2C Enable bit
  inout mien;              //   interrupt enable
  inout msta;              //   Master/Slave bit
  inout mtx;               //   Master read/write
  inout txak;              //   acknowledge bit
  inout rsta;              //   repeated start
  output mbcr_wr;          //   indicates that the control reg has been written
  //   Status Register
  input mcf;               //   end of data transfer
  input maas;              //   addressed as slave
  input mbb;               //   bus busy
  input mal;               //   arbitration lost
  input srw;               //   slave read/write
  input mif;               //   interrupt pending
  input rxak;              //   received acknowledge
  output mal_bit_reset;    //   indicates that the MAL bit should be reset
  output mif_bit_reset;    //   indicates that the MIF bit should be reset
  input msta_rst;          //   resets the MSTA bit if arbitration is lost
  //   Data Register
  inout [7:0] mbdr_micro;
  input [7:0] mbdr_i2c;
  output mbdr_read;
可以看到实际上这个模块的很多输出信号就是这些寄存器的位,控制更底层的如何实现。可以参考pdf查询具体的寄存器(8位)的某一位是什么含义。比如状态寄存器都是input型,因为他主要反馈给uc当前状态,不对底层的状态机控制。数据寄存器中mbdr_micro是inout型,表示是uc总线那一端的,mbdr_i2c是input型,表示是从iic接收到的那一端的。

 

 

  //   State Machine Signals
  `define STATE_TYPE_IDLE	 2'd0
  `define STATE_TYPE_ADDR	 2'd1
  `define STATE_TYPE_DATA_TRS	 2'd2
  `define STATE_TYPE_ASSERT_DTACK	 2'd3
  //   Constant Declarations
  parameter RESET_ACTIVE = 1'b0;
  //   Base Address for I2C Module (addr_bus[23:8])
  parameter MBASE = UC_ADDRESS;
  //   Register Addresses (5 Total):
  //   Address Register (MBASE + 8Dh)
  `define MADR_ADDR	 8'b10001101
  //   Control Register (MBASE + 91h)
  `define MBCR_ADDR	 8'b10010001
  //   Status Register (MBASE + 93h)
  `define MBSR_ADDR	 8'b10010011
  //   Data I/O Register (MBASE + 95h)
  `define MBDR_ADDR	 8'b10010101
uc部分的状态机,µC和 I2C总线控制器之间的交互要用到 I2C总线控制器内部的寄存器,寄存器的地址是24位的,其中高16比特为I2C总线控制器的基址,低8位用于区别不同寄存器。接下来定义了10多个wire型的中间变量,这些事状态机中产生的操纵控制状态机的。由于wire型变量不能再always中赋值,所以后面又用这种方式定义一个相应的reg型变量。

 

 

//   Address match
  wire address_match;
 reg visual_0_address_match;
  assign address_match = visual_0_address_match;

荣耀彩票代理JIASHANGLEvisual_0DEQIANZHUI,ZHEIYANGZUODEHAOCHU?WOXIANGYISHISHIZHONGTONGBU,regXINHAOYOUclockDAYIPAITONGBU,YEBIANYUQUCHUMAOCI,YINWEIassignXINHAOZHIJIEXIANGLIAN,SHAOYOUDOUDONGJIUYOUMAOCI,regXINHAODAPAIZIKEYIBIMIANZHEIZHONGWENTI。ERSHIKEYIMOUXIEXINHAOZUOLEISIANJIANJIANCEYIYANGDEXIAODOU,JULI:

 

51    input as; 
221   begin
      visual_0_as_int 						//这里又有一个时钟的延迟一拍
      visual_0_as_int_d1					//经过一个时钟的延迟一拍,为了检测到正确的下降沿而没有抖动的干扰
      visual_0_ds_int <= ds;
      if ((!as && as_int_d1 && addr_bus[23:8] == MBASE))		//低8位是区别那个寄存器
        visual_0_address_match <= 1'b1;
      else
        visual_0_address_match <= 1'b0;
      end
135   reg visual_0_as_int;
      assign as_int = visual_0_as_int;
138   reg visual_0_as_int_d1;
      assign as_int_d1 = visual_0_as_int_d1;

 

 

可以看见从221行开始,获取as输入,经过几个中间变量的周转,在if中通过!as && as_int_d1来达到类似案件去抖的效果。另外有些变量是对外输出的,也需变成reg型。 这部分的实际工作流程如图:
根据上图的流程:第一个always块, // Process:SYNCH_INPUTS 判断as是否有有效的下降沿,然后总线的高16位是否是正确的我们这个iic设备在真个cpu外设总线上的地址。为真,则visual_0_address_match信号为1,起始对应为address_match,这个成为后续的控制判断,状态机的重要依据。接下来是uc模块的主状态机:

 

  always @(prs_state or as or as_int_d1 or ds_int or address_match)
  begin
    visual_0_next_state <= prs_state;			//2位的变量,4个状态
    visual_0_dtack_com <= 1'b1;					
    visual_0_dtack_oe <= 1'b0;
    case (prs_state)
      `STATE_TYPE_IDLE :						//引用定义的变量
        //  ----------- IDLE State (00) -------------
        //   Wait for falling edge of as
        if (as_int_d1 && !as)					//as表示输入地址有效信号,低有效,这里的as_int_d1实际上是一个类似按键去抖的效果,延迟了2拍,追踪信号就可以发现
          //   falling edge of AS
          visual_0_next_state <= `STATE_TYPE_ADDR;
 
      `STATE_TYPE_ADDR :
        //  ---------- ADDR State (01) --------------
        //   Check that this module is being address
        if (address_match)						//225行由输入的bus决定,也是打了一拍,做到时钟同步
          //   Wait for ds to be asserted, active low
          if (!ds_int)							//由输入的ds决定
            visual_0_next_state <= `STATE_TYPE_DATA_TRS;
          else
            visual_0_next_state <= `STATE_TYPE_ADDR;
        else
          //   this module is not being addressed
          visual_0_next_state <= `STATE_TYPE_IDLE; 
      `STATE_TYPE_DATA_TRS :
      begin
        //  -------- DATA_TRS State (10) ------------
        //   Read or write from enabled register
        visual_0_next_state <= `STATE_TYPE_ASSERT_DTACK;	//过渡态,为了给出oe的信号,内部控制线
        visual_0_dtack_oe <= 1'b1;							//前面被置为0了的
      end
      `STATE_TYPE_ASSERT_DTACK :
      begin
        //  ------ ASSERT_DTACK State (11) ----------
        //   Assert dtack to uProcessor
        visual_0_dtack_com <= 1'b0;							//前面被置为1了的
        visual_0_dtack_oe <= 1'b1;
        //   Wait for rising edge of as and ds
        if ((!as_int_d1) && (!ds_int))						//锁存操作,直至DTACK有效,甚至可以分析锁存了几个时钟?
          visual_0_next_state <= `STATE_TYPE_ASSERT_DTACK;
        else if ((as_int_d1) && (ds_int))
          visual_0_next_state <= `STATE_TYPE_IDLE;
      end
    endcase
  end
</pre><pre code_snippet_id="1669606" snippet_file_name="blog_20160502_10_3192142" name="code" class="plain">注意在848行处://   set SDA and SCL
  assign sda = (sda_oe == 1'b1 ? 1'b0 : 1'bz);
  assign scl = (scl_out_reg == 1'b0 ? 1'b0 : 1'bz);
  assign scl_not =  (~ (scl)) ;
  //   sda_oe is set when master and arbitration is not lost and data to be output = 0 or
  //   when slave and data to be output is 0
  assign sda_oe = (((master_slave == 1'b1 && arb_lost == 1'b0 && sda_out_reg ==
                  1'b0) || (master_slave == 1'b0 && slave_sda == 1'b0) ||
                  stop_scl_reg == 1'b1) ? 1'b1 : 1'b0);
所以sda实际上经由sda_out_reg,visual_0_sda_out_reg,sda_out,visual_0_sda_out控制,即下图状态机中的visual_0_sda_out实际代表了sda,同样scl也一样。

 

 

 

GAIZHUANGTAIJIHAISHIBIJIAOQINGXIDE。

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荣耀彩票代理JIEXIALAIDEalwaysSHIXIANvisual_0_prs_state <= next_state;QUDONGZHUANGTAIGENGDIE。JIEXIALAISHIPANDUANNEIGE24WEIDEDIZHISHIYINGSHEDAONEIGEJICUNQI,MEIGEJICUNQIJICHUYIGEXINHAOXIAN,RUOXUANZHONGZEWEI1,QUDONGXIAYIGEalwaysKUAIZHONGDESHUJUJUTICHUANDAONAGEJICUNQIZHONG。XIAGEalwaysKUAIZHONG,SHIXIANLEDUIBUTONGZHUANGTAIXIADEYIXIEXINHAOLIANGDESHEZHI,ERMEIYOUZAIZHIQIANDEZHUANGTAIJIZHONGSHIXIAN。MEIGENXINHAOXIANDEHANYIKEYICHApdf。mbcr_wrDAIBIAOLEmbcrSHIBEIDULEHAISHIBEIXIELE。QISHIStatus RegisterSHIZHIDUDE,XIEDEHUAHUICHANSHENGFUWEI。QITAJIGEJICUNQILEISI,BIJIAOHAOLIJIE,LIJIEGUANYUSHUJUJICUNQIDESHUJULIUXIANG。ZHEILIMIANDE8WEISHUJUDOUSHIYIGEclkWANCHENG,ZHUYIYUSHANGMIANDEdtackDEHANYIZAISHIXUSHANGSHIFOUCHONGTU,YINWEIdtackSHIBIAOZHENGSHUJUYIJINGZHUNBEIHAO

ZUIHOUJIUSHIJIGEassignYUJU,GENJUSHANGMIANDEXINHAOCHULISHIFOUYOUZHONGDUAN,dtack,JUEDINGSHICHUANSHUJINLAIMOUGEXINHAOHAISHIJICHUMOUGEXINHAO。

ZONGDELAISHUOJIEGOUBIJIAOQINGXI,MOKUAIHUABIJIAOQINGXI。ZHUANGTAIJICAIYONGLEFENDUANSHIDEXIEFA。

荣耀彩票代理i2c_control_blk_ver.vWENJIAN

荣耀彩票代理TADEJIEKOUZHUYAOSHIucJIEKOUWENJIANZHONGDEJICUNQIDEXINHAOXIAN。FENBIEDINGYILESHUJULIUCHENGDEZHUANGTAIJIHEsclXINHAODEZHUANGTAIJI。JIEXIALAISHIYIDUIDEZHONGJIANXINHAODEDINGYIHELEISIDEJIASHANGvisual_0HOUDEregCHULI。

JIEXIALAISHOUXIANLIHUALEupcnt4MOKUAIYONGLAITONGJIbitSHU。ZHEISHIYIGEBUFENGDINGDE4WEIJISHUQI,DANSHIKEYISHURUYIGE4WEISHUJULAIXIUGAIJISHUZHI。JIEXIALAIZAILIHUAYIGEYONGYUclkDEJISHU,DADAOFENPINDEXIAOGUO。JIEXIALAISHILIHUALE2GESHIFT8_blk,GAIMOKUAIKEYIloadHESHUCHU1GE8WEISHU,YEKECHUANXINGJIESHOUHEFASONGYIGEYIWEISHU。LIHUALE2GEDIYIGESHIiicDUANDE,YIGESHIucDUANDE。JIEXIALAISHIZONGXIANZHONGCAI,ZHUYAOSHImsta_rstYUarb_lostWEI。DANGWEIZHUJI,scl_inWEIsclDECAIYANG。YOUDAIZHONGDIANFENXI?

接下来是scl信号的一个状态机:

荣耀彩票代理I2C ZONGXIANKONGZHIQIFUWEIHOUCHUYUIDLE ZHUANGTAI,BUQUDONGSCL HESDA,CISHII2C ZONGXIANSHANGDEQITAMaster KEYIKONGZHISCL HESDA。RUGUOI2C ZONGXIANKONGZHIQICHUYUMaster MOSHI,ERQIEI2C ZONGXIANCHUYUKONGXIANZHUANGTAI,μC TONGGUOZHIWEIMBCR JICUNQIDEMSTA BITESHIGEN_START XINHAOWEIGAO,NEIMEZHUANGTAIJIJINRUSTART ZHUANGTAI。

ZAI START ZHUANGTAI,SCL BAOCHIWEIGAODIANPING,TONGSHIQUDONGSDA XINHAOBIANDI,CONGERZAII2C ZONGXIANSHANGCHANSHENGYIGEQISHIWEI。XITONGSHIZHONGJISHUQIQIDONGJISHU,ZHIDAOMANZUI2C GUIFANYAOQIUDEQISHITIAOJIANBAOCHISHIJIAN(>4ns),ZHUANGTAIJIJINRUSCL_LOW_EDGEZHUANGTAI。

ZAI SCL_LOW_EDGE ZHUANGTAI,ZHUANGTAIJISHISCL CHANSHENGYIGEXIAJIANGYANBINGFUWEIXITONGSHIZHONGJISHUQI,RANHOUZAIXIAYIGESHIZHONGYANDAOLAISHIJINRUSCL_LOW ZHUANGTAI。

ZAISCL_LOW ZHUANGTAI,SCL BAOCHIWEIDI,TONGSHIJINXINGJISHU,ZHIDAOCHANSHENGGUIDINGDESCL DIDIANPINGSHIJIAN(>4.7ns)。CHANSHENGGUIDINGDE SCL DIDIANPINGSHIJIANHOU,RUGUOSHIQUZHONGCAI,NEIMEWANCHENGYIGEZIJIEDECHUANSHUZHIHOUZHUANGTAIJIHUIDAOIDLE ZHUANGTAI,FOUZEZHUANGTAIJIJINRUSCL_HI_EDGE ZHUANGTAI。

荣耀彩票代理ZAI SCL_HI_EDGE ZHUANGTAIZHONG,ZHUANGTAIJISHIFANGSCL XIAN,XIWANGCHANSHENGSCL SHANGSHENGYAN,DANSHISCL XIANKENENGBEIQITAMaster ZHIDI,YINCIZHUANGTAIJIBINGBUZHIJIEZHUANYIDAOSCL_HI ZHUANGTAI,ERSHIDENGDAISCL XINHAOBIANGAOZHIHOUCAIJINRUSCL_HI ZHUANGTAI。

进入 SCL_HI 状态后,系统时钟计数器进行计数,以产生I2C规范要求的SCL高电平时间(>4.0ns),如果检测到重复起始条件或停止条件,状态机将在1/2SCL 高电平时间之后转移到 START状态重新开始,或转移到 IDLE状态,否则产生要求的 SCL高电平时间后状态机进入 SCL_LOW_EDGE状态,继续产生下一个 SCL脉冲。

JIEXIALAISHIZHUANGTAIJIDEQUDONGvisual_0_scl_state <=next_scl_state;JIEXIALAISHIvisual_0_sda_inZHEILEIXINHAO,ZHEIGECHULI,visual_0_scl_inBINGBUSHIYOUsclSHANCHU,JINJINSHIDUIZHEIGEXINHAODEYIGECAIYANG。YESHISHANGMIANWOMENPANDUANsclSHIFOUBEIBIERENLAGAODEYIJU。

后面是start和stop信号产生和检测的一个信号线的处理,也包括主从机的。在下来就是主状态机了:

 

FUWEIHOU,ZHUANGTAIJIZAI IDLE ZHUANGTAI,DANGJIANCEDAO START XINHAOSHI,ZHUANYIDAOHEADER ZHUANGTAI。STARTXINHAOYOU I2C ZONGXIANSHANGDEQISHIWEICHUFA,CHUFAZHEIGEQISHIWEIDE Master KEYISHI I2C ZONGXIANKONGZHIQIBENSHENHUOQITADE I2C ZONGXIANZHUJI。

ZAI HEADER ZHUANGTAI,RUGUO I2C ZONGXIANKONGZHIQICHUYU Master MOSHI,TAHUIBA MBDR ZHONGDESHUJUZUOWEIHEADER FASONGDAO I2C ZONGXIANSHANG,YIXUNZHITEDINGDE Slave。BUGUAN I2C ZONGXIANKONGZHIQICHUYU Master HAISHISlaveMOSHI,ZAIHEADER ZHUANGTAISHI,I2C ZONGXIANKONGZHIQIDOUHUIJIESHOUZONGXIANSHANGDESHUJU,BAOCUNDAO I2C Header Shift Register ZHONG,SHOUDAO8 GEBITEHOU,ZHUANGTAIJIZHUANYIZHI ACK_HEADER ZHUANGTAI。

荣耀彩票代理ZAI ACK_HEADER ZHUANGTAI,RUGUO I2C ZONGXIANKONGZHIQICHUYU Master MOSHI,TAHUICAIYANG SDA XIAN,YIPAN DUAN SUO XUN ZHI DESlave SHI FOU XIANG YING 。 RU GUO MEI YOU XIANG YING , ZHUANG TAI JI ZHUAN YI DAOSTOP ZHUANG TAI , TONG ZHISCL/START/STOPGenerator CHANSHENGSTOP XINHAO,ZHONGZHICHUANSHU。RUGUO Slave CHANSHENGLEXIANGYINGBITE,ZHUANGTAIJIGENJU Header DEZUIDIWEIPANDUANFAQIDESHIFASONGCAOZUOHAISHIJIESHOUCAOZUO,RANHOUZHUANYIDAO RCV_DATA ZHUANGTAIHUO XMIT_DATA ZHUANGTAI。RUGUOI2C KONGZHIQICHUYUSlave MOSHI,DIANLUHUIBUDUANBIJIAO Header Shift Register DENEIRONGHE I2C ZONGXIANKONGZHIQIDIZHIJICUNQI MADR DENEIRONGSHIFOUXIANGDENG,RUGUOXIANGDENG,SHUOMINGBENI2CZONGXIANKONGZHIQIBEIQITA Master XUNZHI,YUSHI I2C ZONGXIANKONGZHIQILIJIZHUANHUANDAO Slave MOSHI,BINGBAZHUANGTAIJICUNQI MBSR DE MAAS BITEZHI 1,ZHISHI I2C ZONGXIANKONGZHIQIBEIQITA Master XUNZHI。TONGSHIMBSR DESRW BITEJILUHeader DEZUIDIWEI,YIBIANµC PANDUANMaster QINGQIUDESHIDUHAISHIXIECAOZUO。

ZAI RCV_DATA ZHUANGTAI, I2C ZONGXIANKONGZHIQICHUYUJIESHOUZHUANGTAI(JIZHUJIJIESHOUZHUANGTAIHUOCONGJIJIESHOUZHUANGTAI),ZHUANGTAIJIDURU I2C ZONGXIANSHANGDESHUJUBINGBAOCUNDAOYIWEIJICUNQIZHONG,DUWAN 8 BITEDESHUJUHOUJINRUACK_DATA ZHUANGTAI,FACHUXIANGYINGBITE。XIANGYINGBITEDEQUZHIGENJU I2C ZONGXIANKONGZHIQISHI Master HAISHI SlaveYOUSUOBUTONG,DANGI2C ZONGXIANKONGZHIQISHISlave SHI,XIANGYINGBITEYINGWEI 0,BIAOSHIZHENGCHANGJIESHOU;DANG I2C ZONGXIANKONGZHIQISHIMaster SHI,RUGUOYIJINGSHOUDAOLEZUGOUDESHUJU,XIANGYINGBITEYAOSHEZHIWEI 1,TONGZHI Slave TINGZHIFASONG,FOUZEXIANGYINGBITEYINGWEI 0,TONGZHISlave JIXUFASONG。XIANGYINGBITEDEZHIYOU MBCR DE TXAK WEIJUEDING, µC KEYIZAISHIDANGDESHIHOUXIERU。JIANCEDAO I2C ZONGXIANSHANGDETINGZHIWEISHI,ZHUANGTAIJIZHUANYIDAO STOP ZHUANGTAI。

ZAI XMIT_DATA ZHUANGTAI, I2C ZONGXIANKONGZHIQICHUYUFASONGZHUANGTAI(JIZHUJIFASONG,HUOCONGJIFASONGZHUANGTAI),ZHUANGTAIJIBASHUJUJICUNQI MBDR DESHUJUYIWEISHUCHUDAO SDA XIANSHANG,FASONG 8 BITEHOUJINRUGET_ACK_DATA ZHUANGTAI,SHOUDAOXIANGYINGBITEHOU,ZHUANGTAIJIHUIDAO XMIT_DATA ZHUANGTAI,JIXUFASONGXIAYIGEZIJIE。RUGUOMEIYOUSHOUDAOXIANGYINGBITE,SHUOMINGFASONGJIESHUHUOCHUCUO,ZHUANGTAIJIZHUANDAO STOP ZHUANGTAI。

ZAI STOP ZHUANGTAI,RUGUOCHUYU Master MOSHI,ZHUZHUANGTAIJITONGZHI SCL/START/STOP Generator CHANSHENGTINGZHIWEI。XIAYIGESHIZHONGYANDAOLAISHI,ZHUANGTAIJIZIDONGZHUANYIDAO IDLE ZHUANGTAI。

荣耀彩票代理HOUMIANJIUSHIstart stopJIANCEMOKUAI,HAIYOUYIXIEJICUNQIXINHAOXIANDECHANSHENG。

KEYIKANDAOZHEIZHONGSHEJISILUSHIFENCENGCIMOKUAIDE。ucNEIYIDUANSHIGENJUSHUJUJIAOHUDELIUCHENG,DUXIEKONGZHIJICUNQI,RANHOUJICUNQIDEXINHAOSHUCHUJIDICENGQUSHIXIANGEZHONGKONGZHI。ERDICENGYESHIFENQUKUAI,2GEZHUANGTAIJI,YIGESHIXIANsclXINHAODEZHIGAOHEZHIDI,QIJIANYOUZHONGCAIJIANCE,ZHUCONGJIDEQIEHUAN,JIESHUQISHIWEIDEPANDUANDENGDENG,LINGYIGESHIXIANiicYUWAIBUSHEBEITONGXINSHIDEJIAOHULIUCHENG,RUXIANXUNZHI,ZAIDENGDAIQUEREN,ZAIXUXIEZHILEIDE。ZHONGJIANYOUHENDUOXINHAOXIANQUTONGBUKONGZHIBIEDEalwaysKUAIHUOZHEBEIBIEDEXINHAOXIANKONGZHI。HAIYOUQISHI,JIESHUJIANCEDEalwaysKUAI,ZHENDUIGEGEJICUNQIDEFUZHIDEZHUANMENDEalwaysKUAIDENGDENG。

2.3 OR1200的iic控制器

ZHEISHIYIGEDAIwishboneZONGXIANJIEGOUDEiicJIEKOU,SUOYIANZHAODINGCENGKUANGTULAIHUASHURUSHUCHUXINHAO,KEYIFAXIANSHURUYIDUANQUANSHIwbJIEKOUDEXINHAOXIAN,SHUCHUJIUSHI2GENsclHEsda,DANSHIZHUYIDESHIZHEILIBINGBUSHIsclYUsda:

 

	// I2C signals
	// i2c clock line
	input  scl_pad_i;       // SCL-line input			//?不是inout结构?
	output scl_pad_o;       // SCL-line output (always 1'b0)
	output scl_padoen_o;    // SCL-line output enable (active low)

	// i2c data line
	input  sda_pad_i;       // SDA-line input
	output sda_pad_o;       // SDA-line output (always 1'b0)
	output sda_padoen_o;    // SDA-line output enable (active low)
实际上我们需要在这个三态门添加更高的设计层次:

 

 

	assign scl = scl_padoen_o ? 1'bz : scl_pad_o;
	assign sda = sda_padoen_o ? 1'bz : sda_pad_o;
	assign scl_pad_i = scl;
	assign sda_pad_i = sda;

 

DINGYILEBUTONGDEJICUNQI,BAOKUOSHIZHONGFENPINDEJICUNQI,ZHICHIYIBUFUWEI。wb_adr_iXINHAOJUEDINGJUTIDUINAYIGEJICUNQICAOZUO。RANHOUSHIJICUNQIDEZHIDEXIUGAI。ZHEIGEtopMOKUAIZHONGMEIYOUDINGYIZHUANGTAIJI,SHIYOUYUwbJIEKOUDEYUANYIN,BUXIANG2.2DESHIXIANFANGSHISHIYOUZHEIMEYIGELIUCHENGDE。ERZHEILIYINWEISHIYOUTONGYIDEwbJIEKOUDEYUANYIN,SUOYIJIANDANDEDUO。LINGWAIwbJIEKOUDEHENDUOXINHAOXIANKEYIGENJUZIJIDEXUQIUQUXIUGAIQIGONGNENGHANYIDE。

DANSHIZHEIGEJINJINSHIZHUJI,BINGMEIYOUSHIXIANWANZHENGDEiicJIEKOU,MEIYOUZHONGCAIDENG。

topZHONGLIHUALEi2c_master_byte_ctrl,i2c_master_byte_ctrlZHONGLIHUALEGENGDICENGCIDEi2c_master_bit_ctrl。i2c_master_byte_ctrlZHONGYESHIYIGEZHUZHUANGTAIJIWEICHIZHEstart、FA、SHOU、ackDENGJIAOHULIUCHENG,i2c_master_bit_ctrlJIANGstart、stop、rd、wrDOUFENCHENGLEHAOJIDUAN,WEICHIZHEYIGEPANGDADEZHUANGTAIJI ,LIMIANSHIDUIsda,sclXINHAOXIANDEGAODIDEKONGZHI。YESHIMOKUAIHUADEBIJIAOQINGXI,JIUBUZIXIJIANGLE

SHUOJIDIANGANSHOUBA:

荣耀彩票代理1、DUIYUZHEIZHONGBIJIAOFUZADESHEJI,SHIJISHANGMOKUAIDEHUAFENFEICHANGZHONGYAO,LIQINGCHUGEGEMOKUAIJIANDEHULIAN,MEIGENXINHAOXIANDEHANYI。BIRUZHEILIucNEIYIDUANDEFENDUANSHIZHUANGTAIJI,YUJICUNQIDESHEJIDENG。

2、GAILICHENGBIJIAOFUZA,FEICHANGFANZA,YOUHENDUODEXINHAOXIAN。GEXINHAOXIANZHIJIANDELIANJIEBIJIAOFANZA,TEBIESHIHAIYOUZHONGCAIZHEIYIKUAI,BUHAOLIJIE。SUOYOUDUIYUZHEIZHONGFUZADESHEJI,MEIYOUXIANGXIDEZHUSHIHENNANLIJIE。LINGWAIZHENDUIiicDEXIEYI,DAJIADELIJIEHESHEJISILUBUYIYANG,KEYIYOUHENDUOZHONGSHIXIANFANGSHI,BAOKUOYIXIEGERENDEXIEFAXIGUAN,RUDUIYUZHUANGTAI,DUIZHONGJIANXINHAODEDINGYIYUCHULIDENG,DOUYOUCHAYI

荣耀彩票代理3、HENDUODEXIAOJIQIAO,DUIYUXINHAODEMINGMING,DAJIEPAIDECHULIDENGDENG

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